build18 hackathon 2025
teammates: kody liang, jaehyun lim*, john alacce

tools: systemverilog, vcs, vivado
project repository

*Thanks to Jaehyun for writing the original project description (which this article is largely based on) and for making such pretty graphics!

💡 practical application

Computer processors usually rely on complex instruction sets with hundreds of distinct commands (like ADD, MULTIPLY, and JUMP) to execute software. This hackathon project built an ultra-minimalist CPU that operates using only a single mathematical instruction (SUBLEQ: subtract and branch if less than or equal to zero). Despite having just one command, the hardware processor is fully functional and capable of running a complete Flappy Bird video game on a monitor.

JustOneFlappyBird is a Turing-complete, one-instruction-set processor that executes the SUBLEQ esoteric programming language. To demonstrate hardware functionality, we animated Flappy Bird via VGA display on an AMD/Xilinx Spartan-7 FPGA (Boolean Board) using SystemVerilog RTL, Synopsys VCS simulation, and AMD Vivado synthesis. Built as part of CMU ECE’s Build18 2025 hardware hackathon.

subleq, briefly

SUBLEQ is an esoteric programming language consisting of a single instruction: SUBtract and branch if Less-than or EQual to zero. Instructions take the form A B C where A, B, and C are memory addresses. The processor computes *B - *A (dereferencing memory) and stores the result back into B. If the result is $\le 0$, the program counter jumps to C.

uniprocessor design

uniprocessor-datapath

The processor contains a program counter register, two operand registers (A and B), and a destination address register for storing the subtraction result. The datapath includes 2-read-1-write memory, a subtractor (*B - *A), and a comparator (*B - *A <= 0).

uniprocessor-fsm

The processor executes each SUBLEQ instruction in 8 clock cycles across 5 execution steps:

  1. Fetch addresses A and B using PC and PC+1.
  2. Latch address B into the B address register.
  3. Read memory at A and B to retrieve *A and *B.
  4. Latch *A and *B into operand registers, fetching address C using PC+2.
  5. Store *B - *A back to address B, branching to C if the result is $\le 0$.

graphics & vga

vga

Bird and pipe sprites render via combinational logic. Sprites are partitioned into column groups with shared row color assignments, avoiding individual pixel logic overhead.

Once color assignments are generated, the frame renders via a VGA engine adapted from our 18-240 Pong project. Because the Boolean Board uses an HDMI output port, Xilinx IP converts raw VGA signals to HDMI streams.

system architecture

The processor connects to the “Draw Bird” graphics module and VGA controller via MMIO. When SUBLEQ instructions write to MMIO-mapped addresses, the Draw Bird module updates screen coordinates and triggers render updates in the VGA engine.

system

photos

group-photo-1
Left to right: John Alacce, David Chan, Kody Liang, Jaehyun Lim

group-photo-2
"You guys are goofballs" - Professor Bill Nace